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Legal
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Section:  IT & Internet   Vacancy 390

Post:Test Chip Silicon Validation Engineer - Sheffield Salary contractual
Requirements and conditions
Age: Has no value
Gender Has no value
Education: no
Work schedule: Has no value
Work place: Birmingham
The announcement text: Test Chip Silicon Validation Engineer - Sheffield

This international company is looking for a Test Chip Silicon Validation Engineer to run the validation test suite and characterise test chip silicon for both internal and external customers. Your key responsibility will be the creation of test chip validation reports based on the evaluation of various test chips. Additional responsibilities include; Adapting Verilog test benches to make them suitable for synthesis onto an FPGA, Debugging and correcting various test chip and board level problems, Setting up on-chip phase locked loops using simple C code, Building Validation Suite binaries, Running tests on the test chips over a range of core voltages, Resolving test failures and Characterising test chips by taking power measurements. Required skills: Perl scripting, Verilog HDL, FPGA synthesis using the Simplicity-Xilinx tool flow, Debug Tools, Some knowledge of C or C++, Hardware debug skills, Test automation using National Instruments Lab View, ability to work effectively with remote teams, ability to work unsupervised and ability to liaise with external customers to solve technical problems. Also a plus: benchmark code such as Dhrystone, and operating systems such as Linux, WinCE and Symbian OS. Excellent salary and benefits for the right person. For more information please send your CV to info@additionalresources.com For further opportunities please visit: http:**www.additionalresources.net


C, C++, UNIX, Linux, Perl, verification, ARM, Dhrystone, Test Automation, simplicity Xilinx, FPGA, WinCE, Symbian OS
Contact information
Employer:
Email: 103@kio.lab.org.ua
Phone: 01636 678540
Publication date: 2009-12-13 13:53:05

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